Seoul, Korea – Samsung Electronics Co., Ltd. has started to mass produce the industry’s first three-dimensional (3D) Vertical NAND (V-NAND) flash memory. This represents a breakthrough of the current scaling limit for existing NAND flash technology with improvements in performance and area ratio, according to the semiconductor manufacturer. The 3D V-NAND targets a variety of consumer electronics and enterprise applications, including embedded NAND storage and solid state drives (SSDs).
The V-NAND offers a 128 gigabit (Gb) density in a single chip, using Samsung’s proprietary vertical cell structure based on 3D Charge Trap Flash (CTF) technology and vertical interconnect process technology to link the 3D cell array. Together, these technologies enable Samsung to produce 3D V-NAND with more than twice the scaling of 20-nm-class planar NAND flash. (20-nm-class refers to a process technology node between 20 and 30 nanometers.)
The device solves the technical challenges of scaling limit, which has resulted in a trade-off in reliability, through the innovation of circuits, structure and the manufacturing process by using a vertical stacking of planar cell layers for a new 3D structure. The new vertical structure, which can stack as many as 24 cell layers vertically, enables Samsung to produce higher density NAND flash memory products.
“By making the CTF layer three-dimensional, the reliability and speed of the NAND memory have improved sharply,” said Samsung. The 3D V-NAND shows an increase of 2X to 10X higher reliability, and twice the write performance over conventional 10-nm-class floating gate NAND flash memory, according to the company. (10-nm-class refers to a process technology node between 10 and 20 nanometers.)
The global NAND flash memory market is expected to reach $30.8 billion in revenues in 2016, from $23.6 billion in 2013 with a compound annual growth rate of 11 percent, according to IHS iSuppli Corp.