Anglia Signs Agreement With Cre-sound
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Impact Conference: October, 13, 2015
About the Conference
The industry’s experts will gather for discussion, insight, and collaboration to enhance system-level design, performance and cost savings with first time right solutions. Boards, Chips and Packaging: Designing to Maximize Results is a must-attend event for board designers, system architects, chip designers, package designers, program managers, and marketing executives involved in the system-level ecosystem decisions. You will leave this event with a better understanding of what you can do to get your company the design wins that provide the highest performance and lowest power at the least possible cost while minimizing respins.
Speakers
Jim Feldhan, President, Semico Research Corp.
Michael Gay, Director of Strategic Accounts, Isola
Jason Marsh, Vice President of Product Management, Insulectro
Lee Ritchey, Founder & President, Speeding Edge
Scott McMorrow, R&D Consultant, Teraspeed Consulting—A Division of Samtec
Heidi Barnes, Senior Application Engineer, Keysight Technologies
Geoffrey Hazelett, Product Specialist, Polar Instruments
Nathapong Suthiwongsunthorn, Ph.D., Vice President, Research & Development, UTAC
Tom Whipple, Product Engineering Architect, Cadence
Nathaniel Unger, Director of Package Design, Altera
Robert L. Sankman, Intel Fellow, Director, Package Pathfinding, Assembly Test Technology Development
Daniel N. de Araujo, Principal Engineer - Nimbic, Mentor Graphics
Margaret Schmitt, Electronics Business Development Director, ANSYS
Luncheon Keynote: Captain Chesley B. "Sully" Sullenberger III
Panel Moderators:
Brian Fuller, Editor in Chief, ARM
Mike Noonen, CEO (interim), Ambiq Micro
Venue
Computer History Museum, 1401 N Shoreline Blvd., Mountain View, California 94043 Directions
Early Bird Price: $75 Less than one week left to register at this price
Walk-up Registration: $150
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