Previous articles have introduced the idea of LLC markets, their issues in the current electronic ecosystem, and their importance relative to future mega-trends such as AI/IOT. The fundamental issue is the intense churn of the supply chain generated by the consumer dominated semiconductor marketplace for LLC markets such as aerospace and defense. Interesting economic models around insurance and maintenance services can be introduced to address these problems, but to be effective, they require the integration of technology and business.
In semiconductor design, the combination of abstraction and EDA technology has led to very powerful business models. The current fabless ASIC flow anchored by companies such as TSMC combines the fundamental notion of libraries with EDA technology which create various levels of certification and signoff. Similar models exist at the ASIC and even at FPGA level. A great deal of this formalization is driven by the economics of semiconductors where the cost of development is very high and the cost of failure is even higher.
For PCB/system design, the range of modeling and connection to implementation has had a wider range of formalization and today there is no concept of certified signoff. Typical variations for system design include:
- MS Word flow: The system specification is built informally in MS Word and a design team translates the spec into a system design generally consisting of some combination of embedded processors, FPGAs, analog signal chain, and sensors. In this flow, there is no formal validation platform other than the final implementation.
- Mathworks or Mirabilis design: A very common flow is to build a system specification inside of a modeling/analysis environment such as Mathworks and then translate to a PCB design. The advantages of this flow are that a higher level validation environment exists and it is also possible to build parts of the design from the mathworks code directly.
- Integrated system model: Large integrated cyber physical systems such as planes often have large and complex system simulation models which can be used for validation.
Given the relatively lower costs of PCB assembly, many design teams have the view that it is best to get to the final design quickly and verify it in a real system environment. This path has the utility of not having to worry about managing an additional level of abstraction, worrying about modeling accuracy, and minimizing design time.
Further, in the case of LLC designs, some design teams take some time to look at predictions of obsolescence as a factor in parts selection, and some organizations manage a qualified vendor list to manage the supply chain related issues.
However, part selection can only provide a limited degree of freedom to address LLC issues. A much higher level of physical design freedom can be employed if the system design and associated validation is captured in such a manner as to constitute certified signoff to an EMS.
How can one build certified handoff ideas into the PCB design flow?
The core components already exist in the system on chip (SoC) flows employed in semiconductors. The key components are shown in figure one:
- A formalized behavioral description of the system with its validation structure
- A set of pre-verified architectural components. These may be real chips or abstract in nature.
- A mapping between the behavior and architecture with automated communication.
In the PCB world, EMS companies can build such a PCB ASIC value added model. That is, accept a system design at a higher level and take the responsibility of delivering the resulting design (with maintenance).
With this model, EMS companies can provide much more value for a large host of companies and thus be able to charge more for the service. For LLC companies in particular, this formalized model would allow for much deeper services on the management of the supply chain where three levels of mitigation could be enabled by the EMS company:
- Embedded design: With sufficient planning, a reprogramming of the end physical device to handle reliability or new function issues in the field. Examples might include a distributed smart transportation solution.
- Validated equivalent BOM: The maintenance function is fulfilled with an updated BOM and mechanisms exist to validate the design at a system level. This model is key for highly regulated industries such as medical.
- Emulated BOM within system design constraints: The maintenance function is fulfilled with an emulated BOM which is validated to the original function. Emulation allows the use of newer technologies in a manner to preserve original function.
Finally, this sort of EDA innovation could certainly be at the center point of broader breakthrough financial concepts such as supply chain insurance. These concepts can be layered on top of a much higher margin “PCB ASIC” model.